It is not possible to calculate quantum cost without implementation of reversible logic. This paper propose a new design for BCD adder that optimized in terms of. Design 1 of Reversible BCD adder With Input Carry. 70 .. The first contribution of this dissertation is the design of a new reversible gate namely the TR. Objectives: Proposed a novel GDI (Gate Diffusion Input) based low power BCD adder to improve the performance further compared with existing BCD adder.

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### A new reversible design of BCD adder – Semantic Scholar

In variables of search space have to be coded to a string of the other words, a circuit may have DC conditions bits, named chromosome. Moorthy MuthukrishnanM. Two implementations of FA generated and optimized by GA: Topics Discussed in This Paper.

The power dissipation, speed, circuit density are the main concerns of research today. Intelligence Review, 20 Reversible logic is one of the potential techniques observed for low power designs having lot of research scope in the fields of nanotechnology, which involves with quantum computing. A chromosome codes a complete reversible or simultaneously.

How to cite item. A qubit is a unit of quantum information. The correction part is a 4-bit binary adder, too. Email the author Login required. Adder electronics Search for additional papers on this topic.

This circuit can further be used in Q3 Q2 Q1 Q0 is output digit. The results show improvement in the quantum cost, the number of garbage inputs and outputs. Article Tools Print this article. Irreversibility and Heat Generation in reversiblf computational Process. Many gates may be used in the synthesis.

The output P is the expected output of the detector. A B Other reversible gates are also proposed in some 4 4 papers [13]. The number of ancilla input bits and the garbage outputs is primarily considered as an optimization criteria as it is extremely difficult to realize a quantum computer with many qubits.

The gates are placed on P these parallel lines. These occur when some DC inputs for the reversible logic circuits [15]. The design goal is to minimize PDP, in order to get low power with high-speed advantage. ErleCharles TsenEric M. SchwarzMichael J. Table 1 digit and Q3 Q2 Q1 Q0 is output digit. Citations Publications citing this paper. Each of A reversible gate has an equal number of inputs these gates is universal, i.

## A new reversible design of BCD adder

The International Symposium on System-onChip. Logical Reversibility of Computation. To assign the optimum circle in Fig.

For instance, in [8] an FA which has four inputs and one output, expressed with four Toffoli and Feynman gates is proposed. If the B input in Fig.

For instance, the Toffoli gate is realized by conditions and DC outputs. World Applied Sciences Journal 4 6: An irreversible BCD adder flag is ‘1’, the sum is added by addef, else do nothing. BCD adder circuit obtained. Each chromosome represents a complete circuit As we will show in the next subsection, a and includes the codes of m gates plus R1 to Rn, the reversible BCD Adder has all types of DCs.